View MGC313012_6965798.PDF datasheet online --- IC-ON-LINE

Datasheet File OCR Text:

? 2012 microchip technology inc. advance information ds41667a-page 1 mgc3130 introduction the mgc3130 is a three-dimensional (3d) gesture recognition and tracking controller chip based on microchip?s patented gestic ? technology. it enables user command input with natural hand and finger movements. utilizing the principles of electrical near- field sensing, the mgc3130 contains all the building blocks to develop robust 3d input sensing systems. implemented as a low-power mixed-signal configurable controller, it provides a large set of smart functional features with integrated signal driver, a frequency adaptive input path for automatic noise suppression and a digital signal processing unit. microchip?s on-chip colibri gesture suite minimizes processing needs, reduces system power consumption and results in low software development efforts for fast time-to-market success. the mgc3130 is a unique solution that provides gesture information as well as positional data of the human hand in real time and allows realization of a new generation of user interfaces across various industries. applications: ? displays ? notebooks/keyboards/pc peripherals ? mobile phones ? tablet computers ? electronic readers ? remote controls ? game controllers power features: ? variety of several power operation modes include: - processing mode: 30 ma @ 3.3v, typical - programmable self wake-up: 45 a @ 3.3v - deep sleep: 9 a @ 3.3v, typical key features: ? recognition of 3d hand gestures and x, y, z positional data ? proximity and touch sensing capabilities ? built-in colibri gesture suite ? advanced 3d signal processing unit ? detection range: 0 to 15 cm ? receiver sensitivity: <1 ff ? position rate: 200 positions/sec ? spatial resolution: up to 150 dpi ? carrier frequency: 70 khz to 130 khz ? channels supported: - 5 receive (rx) channels - 1 transmit (tx) channel ? on-chip auto calibration ? low noise radiation due to low transmit voltage and slew rate control ? noise susceptibility reduction: - on-chip analog filtering - on-chip digital filtering - automatic frequency hopping ? enables the use of low-cost electrode material including: - printed circuit board - conductive paint - conductive foil - laser direct structuring (lds) - touch panel ito structures ? field upgrade capability ? small outline, 28-lead qfn package, 5x5 mm ? operating voltage: 2.5v to 3.6v (single supply) ? temperature range: -20c to +85c peripheral features: ?2x i 2 c? or spi interface for configuration and streaming of positional and gesture data ? multi-zone support via master/slave architecture single-zone 3d gesture controller data sheet
mgc3130 ds41667a-page 2 advance information ? 2012 microchip technology inc. package type the device is available in 28-lead qfn packaging (see figure 1 ). figure 1: 28-pin diagram (mgc3130 ) qfn 1 2 3 4 5 6 715 8 9 10 11 12 13 14 16 17 18 19 20 21 26 25 24 23 22 28 27 v caps v inds v ss2 rx0 rx1 rx2 rx3 rx4 v capa v ss 3 v capd eio0 eio1 eio2 si1 si0 eio3 nc nc nc is2 si2 mclr t xd nc v ss 1 v dd si3 mgc3130 exp-29
? 2012 microchip technology inc. advance information ds41667a-page 3 mgc3130 table 1: 28-pin qfn pi nout description pin name pin number pin type buffer type description v caps 1p ? external filter capacitor (10 f) connection for internal step-up converter (optional). v inds 2p ? external inductor (4.7 h) + schottky diode connection for internal step-up converter usage (optional). v ss 2 3p ? ground reference for the step-up converter. rx0 4 i analog analog input channels: receive electrode connection. rx1 5 i analog rx2 6 i analog rx3 7 i analog rx4 8 i analog v capa 9p ? external filter capacitor (4.7 f) connection for internal analog voltage regulator (3v). v ss 3 10 p ? common ground reference for analog and digital domain. v capd 11 p ? external filter capacitor (220 nf) connection for internal digital voltage regulator (1.8v). eio0 12 i/o st extended io0 (eio0)/interface selection pin 0 (is0). eio1 13 i/o st extended io1 (eio1)/interface selection pin 1 (is1). eio2 14 i/o st extended io2 (eio2)/irq0. is2 15 i st interface selection pin 2 (is2). nc 16 ?? reserved: do not connect. nc 17 ?? reserved: do not connect. nc 18 ?? reserved: do not connect. eio3 19 i/o st extended io3 (eio3)/irq1/sync. si0 20 i/o st serial interface 0 (si0): i 2 c?_sda0/spi_miso. when i 2 c? is used, this line requires an external 1.8 k ?? pull-up. si1 21 i/o st serial interface 1 (si1): i 2 c?_scl0/spi_mosi. when i 2 c? is used, this line requires an external 1.8 k ?? pull-up. si2 22 i/o st serial interface 2 (si2): i 2 c?_sda1/spi_cs. when i 2 c? is used, this line requires an external 1.8 k ?? pull-up. si3 23 i/o st serial interface 3 (si3): i 2 c?_scl1/spi_sclk. when i 2 c? is used, this line requires an external 1.8 k ?? pull-up. mclr 24 i/p st master clear (reset) input. this pin is an active-low reset to the device. it requires external 10 k ?? pull-up. t xd 25 o analog transmit electrode connection. nc 26 ?? reserved: do not connect. v ss 1 27 p ? common ground reference for analog and digital domains. v dd 28 p ? positive supply for peripheral logic and i/o pins. it requires an external filtering capacitor (100 nf). exp 29 p ? exposed pad. it should be connected to ground. legend: p = power; st = schmitt trigger input with cmos levels; o = output; i = input; ? = n/a
mgc3130 ds41667a-page 4 advance information ? 2012 microchip technology inc. table of contents 1.0 theory of operation: electrical near-fie ld (e-field sensing)................................................................ .................................... 5 2.0 feature description......................................................................................................... ........................................................... 7 3.0 system architecture......................................................................................................... ......................................................... 9 4.0 functional description ...................................................................................................... ....................................................... 12 5.0 application architecture .................................................................................................... ....................................................... 21 6.0 interface description ....................................................................................................... ......................................................... 22 7.0 hardware integration ........................................................................................................ ....................................................... 26 8.0 development support ......................................................................................................... ..................................................... 29 9.0 electrical specifications ................................................................................................... ........................................................ 30 10.0 packaging information ...................................................................................................... ....................................................... 31 index .......................................................................................................................... .......................................................................... 35 the microchip web site ......................................................................................................... .............................................................. 36 customer change notification service ........................................................................................... ..................................................... 36 customer support ............................................................................................................... ................................................................. 36 reader response ................................................................................................................ ................................................................ 37 product identification system ................................................................................................. ............................................................. 38 to our valued customers it is our intention to provide our valued customers with the be st documentation possible to ensure successful use of your micro chip products. to this end, we will continue to improve our publications to better suit your needs. our publications will be refined and enhanced as new volumes and updates are introduced. if you have any questions or comments regardi ng this publication, please contact the marketing communications department via e-mail at docerrors@microchip.com or fax the reader response form in the back of this data sheet to (480) 792-4150. we welcome your feedback. most current data sheet to obtain the most up-to-date version of this data s heet, please register at our worldwide web site at: http://www.microchip.com you can determine the version of a data sheet by examining its literature number found on the bottom outside corner of any page . the last character of the literature number is the vers ion number, (e.g., ds30000a is version a of document ds30000). errata an errata sheet, describing minor operational differences fr om the data sheet and recommended workarounds, may exist for curren t devices. as device/documentation issues become known to us, we will publish an errata sheet. the errata will specify the revisi on of silicon and revision of document to which it applies. to determine if an errata sheet exists for a particular device, please check with one of the following: ? microchip?s worldwide web site; http://www.microchip.com ? your local microchip sales office (see last page) when contacting a sales office, please specify which device, re vision of silicon and data sheet (include literature number) you are using. customer notification system register on our web site at www.microchip.com to receive the most current information on all of our products.
? 2012 microchip technology inc. advance information ds41667a-page 5 mgc3130 1.0 theory of operation: electrical near-field (e-field) sensing microchip?s gestic is a 3d sensor technology which utilizes an electric field (e-field) for advanced proximity sensing. it allows realization of new user interface applications by detection, tracking and classification of a user?s hand or finger motion in free space. e-fields are generated by electrical charges and propagate three-dimensionally around the surface, carrying the electrical charge. applying direct voltages (dc) to an electrode results in a constant electric field. applying alternating voltages (ac) makes the charges vary over time and thus, the field. when the charge varies sinusoidal with frequency f, the resulting electromagnetic wave is characterized by wavelength = c/f, where c is the wave propagation velocity ? in vacuum the speed of light. in cases where the wavelength is much larger than the electrode geometry, the magnetic component is practically zero and no wave propagation takes place. the result is quasi-static electrical near field that can be used for sensing conductive objects such as the human body. microchip?s gestic technology uses transmit (tx) frequencies in the range of 100 khz which reflects a wavelength of about three kilometers. with electrode geometries of typically less than twenty by twenty centimeters, this wavelength is much larger in comparison. in case a person?s hand or finger intrudes the electrical field, the field becomes distorted. the field lines are drawn to the hand due to the conductivity of the human body itself and shunted to ground. the three- dimensional electric field decreases locally. microchip?s gestic technology uses a minimum number of four receiver (rx) electrodes to detect the e-field variations at different positions to measure the origin of the electric field distortion from the varying signals received. the information is used to calculate the position, track movements and to classify movement patterns (gestures). the simulation results in figure 1-1 and figure 1-2 show the influence of an earth-grounded body to the electric field. the proximity of the body causes a com- pression of the equipotential lines and shifts the rx electrode signal levels to a lower potential which can be measured. figure 1-1: equipotential lines of an undistorted e-field figure 1-2: equipotential lines of a distorted e-field
mgc3130 ds41667a-page 6 advance information ? 2012 microchip technology inc. 1.1 gestic technology benefits ? gestic e-field sensors are not impacted by ambient influences such as light or sound, which have a negative impact to the majority of other 3d technologies. ? the gestic technology has a high immunity to noise, provides high update rates and resolution, low latency and is also not affected by clothing, surface texture or reflectivity. ? a carrier frequency in the range of 70-130 khz is being used with the benefit of being outside the regulated radio frequency range. in the same manner, gestic is not affected by radio interference. ? usage of thin low-cost materials as electrodes allow low system cost at slim industrial housing designs. ? the further use of existing capacitive sensor structures such as a touch panel?s ito coating allow additional cost savings and ease the integration of the technology. ? electrodes are invisible to the users? eye since they are implemented underneath the housing surface or integrated into a touch panel?s ito structure. ? gestic works centrically over the full sensing space. thus, it provides full surface coverage without any detection blind spots. ? only one gestic transmitter electrode is used for e-field generations. the benefit is an overall low power consumption and low radiated emc noise. ? since gestic is basically processing raw electrode signals and computes them in real-time into pre-processed gestures and accurate x, y, z positional data, it provides a highly flexible user interface technology for any kind of electronic devices.
? 2012 microchip technology inc. advance information ds41667a-page 7 mgc3130 2.0 feature description 2.1 gesture definition a hand gesture is the movement of the hand to express an idea or meaning. the gestic technology accurately allows sensing of a user?s free space hand motion for contact free position tracking, as well as three-dimen- sional (3d) gesture recognition based on classified movement patterns. 2.2 gestic library mgc3130 is being provided with a gestic library, stored on the chip?s flash memory. the library includes: ? colibri suite: digital signal processing (dsp) algorithms and feature implementations. ? system control: mgc3130 hardware control features such as analog front end (afe) access, interface control and parameters storage. ? library loader: gestic library update through the application host?s interface. 2.2.1 colibri suite the colibri suite combines data acquisition, digital signal processing and interpretation. the colibri suite functional features are illustrated in figure 2-1 and described in the following sections. figure 2-1: colibri suite core elements 2.2.1.1 position tracking the colibri suite?s position tracking feature provides three-dimensional hand position over time and area. the absolute position data is provided according to the defined origin of the cartesian coordinate system (x, y, z). position tracking data is continuously acquired in parallel to gesture recognition. with a position rate of up to 200 positions/sec., a maximum spatial resolution of 150 dpi is achieved. 2.2.1.2 gesture recognition the colibri suite?s gesture recognition model detects and classifies hand movement patterns performed inside the sensing area. using advanced stochastic classification based on hidden markov model (hmm), industry best gesture recognition rate is being achieved. in addition, there are some gestures derived from the combination of gesture recognition and spatial information. the colibri suite includes a set of predefined hand gestures which contains flick, circular and symbol gestures as the ones outlined below: ? flick gestures a flick gesture is a unidirectional gesture in a quick flicking motion. an example may be a hand movement from west to east within the sensing area, from south to north, etc. ? circular gestures a circular gesture is a round shape gesture defined by clock direction (e.g., a ?circle clockwise? hand movement inside the system?s sensing area). a circular gesture can have an undefined start to end point and an undefined number of repetitions. ? symbol gestures a symbol gesture is a multi-directional gesture with a defined start and end point. an example for a symbol gesture is a ?check mark? hand movement inside the sensing area. 2.2.1.3 approach detection approach detection is an embedded power-saving feature of microchip?s colibri suite. it sends mgc3130 to sleep mode and scans periodically the sensing area to detect the presence of a human hand. utilizing the in-built self wake-up mode, approach detection alternates between sleep and scan phases. during the scan phases, the approach of a human hand can be detected while very low power is consumed. for more details, please see section 4.2.4.3 ?self wake-up mode? . a detected approach of a user exceeding configured threshold criteria will alternate the mgc3130 from self wake-up to processing mode or even the application host in the overall system. digital signal processing colibri suite position tracking gesture recognition approach detection
mgc3130 ds41667a-page 8 advance information ? 2012 microchip technology inc. within the approach detection sequence, the following scans are performed: ? approach scan : an approach scan is performed during the scan phase of the mgc3130?s self wake-up mode. typically, 1 rx channel is active but more channels can be activated via gestic library. the time interval between two consecutive approach scans is configurable. for typical applications, the scan cycle is in a range of 20 ms to 150 ms. during the approach scan, the activated rx channels are monitored for signal changes which are caused by, for example, an approaching human hand and exceeding the defined threshold. this allows an autonomous wake-up of the mgc3130 and host applications at very low power consumption. ? calibration scan (1) : the approach detection feature includes the possibility to perform additional calibration scans for the continuous adaptation of the electrode system to environmental changes. a calibration scan is performed during the scan phase of the mgc3130?s self wake-up mode. four or five rx channels are active to calibrate the sensor signals. the calibration scan is usually performed in configurable intervals from 2s to 10s. to reduce the power consumption, the number of scans per second can be decreased after a certain time of non-user activity. a typical implementation uses calibration scans every 2s during the first minute, and every 10s afterwards, until an approach is detected. the timing sequence of the approach detection feature is illustrated in figure 2-2 . figure 2-2: approach detection sequence note 1: the calibration scan is only needed for applications using the position tracking feature. current time periodic approach scans calibration scan periodic approach scans calibration scan periodic approach scans calibration scan periodic approach scans 20 ms-150 ms 2s-10s i sleep = 9 a i 5chscan = 30 ma i 5chscan : scan phase with 5 active rx channels: calibration scan i sleep : sleep phase
? 2012 microchip technology inc. advance information ds41667a-page 9 mgc3130 3.0 system architecture the mgc3130 is the first product based on microchip?s gestic technology. it is developed as a mixed-signal configurable controller. the entire system solution is composed by three main building blocks (see figure 3-1 ): ? mgc3130 controller ? gestic library ? external electrodes 3.1 mgc3130 controller the mgc3130 features the following main building blocks: ? low noise analog front end (afe) ? digital signal processing unit (spu) ? flexible communication interfaces it provides a transmit signal to generate the e-field, conditions the analog signals from the receiving electrodes and processes these data digitally on the spu. data exchange between the mgc3130 and the host is conducted via the controller?s communication interface. for details, please refer to section 4.0 ?functional description? . 3.2 gestic library the embedded gestic library is optimized to ensure continuous and real-time free-space position tracking and gesture recognition concurrently. it is fully- configurable and allows required parameterization for individual application and external electrodes. 3.3 external electrodes electrodes are connected to mgc3130. an electrode needs to be individually designed for optimal e-field distribution and detection of e-field variations inflicted by a user. figure 3-1: mgc3130 controller system architecture mgc3130 controller analog front end communications interfaces gestic ? library external electrodes tx rx 5 signal processing unit to application host
mgc3130 ds41667a-page 10 advance information ? 2012 microchip technology inc. 3.3.1 electrode equivalent circuit the hand position tracking and gesture recognition capabilities of a gestic system depends on the electrodes design and their material characteristics. a simplified equivalent circuit model of a generic gestic electrode system is illustrated in figure 3-2 . figure 3-2: electrodes capacitive equivalent circuitry earth grounded ?v t x : tx electrode voltage ?v r x b u f : mgc3130 rx input voltage ?c h : capacitance between receive electrode and hand (earth ground). the user?s hand can always be considered as earth-grounded due to the comparable large size of the human body. ?c r x t x : capacitance between receive and transmit electrodes ?c r x g : capacitance of the receive (rx) electrode to system ground + input capacitance of the mgc3130 receiver circuit ?c txg : capacitance of the transmit (tx) electrode to system ground ?e rx : rx electrode ?e tx : tx electrode the rx and tx electrodes in a gestic electrode system build a capacitance voltage divider with the capacitances c rxtx and c rxg which are determined by the electrode design. c txg represents the tx electrode capacitance to system ground driven by the tx signal. the rx electrode measures the potential of the generated e-field. if a conductive object (e.g., a hand) approaches the rx electrode, c h changes its capacitance. this minuscule change in the femtofarad range is detected by the mgc3130 receiver. the equivalent circuit formula for the earth-grounded circuitry is described in equation 3-1 . equation 3-1: electrodes equivalent circuit a common example of an earth-grounded device is a notebook, even with no ground connection via power supply or ethernet connection. due to its larger form factor, it presents a high earth-ground capacitance in the range of 200 pf and thus, it can be assumed as an earth-grounded gestic system. a brief overview of the typical values of the electrodes capacitances is summarized in tab l e 3 - 1 . c rxtx c txg c rxg system ground transmitter signal electrode signal c h earth ground e-field to mgc3130 v tx system ground e rx e tx v rxbuf table 3-1: electrodes capacitances typical values capacity typical value c r x t x 10...30 pf c t x g 10...1000 pf c r x g 10...30 pf c h <1 pf v rxbuf v tx c rxtx c rxtx c rxg c h ++ ---------------------------------------------- - ? =
? 2012 microchip technology inc. advance information ds41667a-page 11 mgc3130 3.3.2 standard electrode design the mgc3130 electrode system is typically a double- layer design with a tx transmit electrode at the bottom layer to shield against device ground and thus, ensure high receive sensitivity. up to five comparably smaller rx electrodes are placed above the tx layer providing the spatial resolution of the gestic system. tx and rx are separated by a thin isolating layer. the rx electrodes are typically arranged in a frame configuration as shown in figure 3-3 . the frame defines the inside sensing area with maximum dimensions of 20x20 centimeters. an optional fifth electrode in the center of the frame may be used to improve the distance measurement and add simple touch functionality. the electrodes? shapes can be designed solid or structured. in addition to the distance and the material between the rx and tx electrodes, the shape structure density also controls the capacitance c r x t x and thus, the sensitivity of the system. figure 3-3: frame shape electrodes note: ideal designs have low c rxtx and c rxg to ensure higher sensitivity of the electrode system. optimal results are achieved with c rxtx and c rxg values being in the same range. south west east center north top layer (lateral rx) top layer (center rx) tx layer
mgc3130 ds41667a-page 12 advance information ? 2012 microchip technology inc. 4.0 functional description microchip technology's mgc3130 configurable controller uses up to five e-field receiving electrodes. featuring a signal processing unit (spu), a wide range of 3d gesture applications are being pre- processed on the mgc3130, which allows short development cycles. always-on 3d sensing, even for battery-driven mobile devices, is enabled due to the chip's low-power design and variety of programmable power modes. a self wake-up mode triggers interrupts to the application host reacting to interaction of a user with the device and supporting the host system in overall power reduction. featuring a programmable 4-pin digital interface, the mgc3130 matches a multitude of hardware requirements. developers have the choice of data exchange via i 2 c or spi. since the device provides two i 2 c interfaces, developers have the option to set up a master-slave architecture between two mgc3130 devices to add an additional sensing area (e.g., two- zone design) or a single mgc3130 and another circuit with a corresponding interface, such as a touch screen controller. gestic sensing electrodes are driven by a low-voltage signal with a frequency in the range of 100 khz, which allows their electrical conductive structure to be made of any low-cost material. even the reuse of existing conductive structures, such as a display's ito coating, is feasible, making the mgc3130 an overall, very cost- effective system solution. figure 4-1 provides an overview of the main building blocks of mgc3130. these blocks will be described in the following sections. figure 4-1: mgc3130 co ntroller block diagram host signal processing unit (spu) power management unit (pmu) internal clock tx signal generation external electrodes communication control i 2 c tm spi mgc3130 controller signal conditioning adc signal conditioning adc signal conditioning adc signal conditioning adc signal conditioning adc flash memory ios reset block voltage reference (v ref ) txd rx0 rx1 rx2 rx3 rx4 mclr si0 si1 si2 si3 eio1 eio2 eio3 is2 eio0 internal bus low-power wake-up
? 2012 microchip technology inc. advance information ds41667a-page 13 mgc3130 4.1 reset block the reset block combines all reset sources. it controls the device system?s reset signal (sysrst). the following is a list of device reset sources: ?mclr : master clear reset pin ? swr: software reset available through gestic library ? wdtr: watchdog timer reset a simplified block diagram of the reset block is illustrated in figure 4-2 . figure 4-2: system reset block diagram 4.2 power control and clocks 4.2.1 power management unit (pmu) the device requires a 3.3 to 3.6v supply voltage at v dd . enabling the internal step-up converter extends the voltage range to 2.5 to 3.6v. according to figure 4-3 , the used power domains are as follows: ? v dd domain : this domain is powered by v dd = 2.5v to 3.6v (typical v dd = 3.3v). v dd is the external power supply for eio, wake-up logic, wdtr, internal regulators and step-up converter. it is provided externally through the v dd pin. ? v ddc domain : this domain is powered by v ddc = 1.8v. it is generated by an embedded low- impedance and fast linear voltage regulator. the voltage regulator is working under all conditions (also during deep sleep mode) preserving the mgc3130 data context. v ddc is the internal power supply voltage for digital blocks, reset block and rc oscillators. an external block capacitor, c efcd , is required on v capd pin. ? v dda domain : this domain is powered by v dda = 3.0v. it is generated by an embedded low- impedance and fast linear voltage regulator. during deep sleep mode, the analog voltage regulator is switched off. v dda is the internal analog power supply voltage for the adcs and the signal conditioning. an external block capacitor, c efca , is required on v capa pin. ? v ddm domain : this domain is powered by v ddm = 3.3v. v ddm is the internal power supply voltage for the internal flash memory. this power supply is depending on v dd voltage range. if v dd 3.3v, the memory is directly powered through the v dd pin. in case of v dd < 3.3v, the flash power supply is generated internally by an embedded step-up converter. figure 4-3: powe r scheme block diagram ? step-up converter : the step-up converter is generating 3.3v from the connected supply voltage v dd (if it is lower than 3.3v). this voltage is required by the internal flash memory. the required voltage reference is taken from the voltage reference block. during deep sleep mode, the converter is switched off. it requires an external connected inductor, a filtering capacitor and a schottky-diode connected to the v inds and v caps pins. if the supply voltage is high enough, the step-up converter will be disabled. please refer to section 9.0 ?electrical specifications? for more details. mclr glitch filter deep sleep wdtr software reset (swr) wdt time-out sysrst spu digital peripherals reset block internal osc. v ddc domain analog voltage regulator digital voltage regulator flash memory wake-up logic wdtr eio v ddm domain step-up converter v caps v ss 2 v dd v ss 1 v capa v ss3 adc signal conditioning blocks v dda domain v capd v inds v dd domain
mgc3130 ds41667a-page 14 advance information ? 2012 microchip technology inc. 4.2.2 power supervisors during the power-up sequence, the system reset will remain low until the v dd reaches the 1.5v level and the reset delay, t rstdly , has been elapsed (typically 200 us). the system start depends on the target application (if the step-up will be used or not) and on the used v dd voltage. step-up applications (2.5v ? v dd < 3.3v) : the system starts after power-up/time-out period (t pwrt ) if the 2.5v is already reached. the step-up converter starts automatically from 2.5v if the external step-up components are assembled. it stays activated until a 3.5v v dd voltage level is reached. for v dd input beyond this level, the step-up converter will automatically stop operating and the gestic library can disable it. for more details, please refer to figure 4-4 . standard applications (without step-up) (3.3v ? v dd ? 3.6v) : the system starts after power-up/time-out period (t pwrt ) if the 3.3v is already reached. figure 4-4: power supervisors mclr step-up 1.5v v step-up v dd hysteresis t1 t2 2.5v time 3.5v 3.3v t1: t rstdly : reset delay 120 s, typically 200 s t2: t pwrt : power-up time-out
? 2012 microchip technology inc. advance information ds41667a-page 15 mgc3130 4.2.3 clocks the mgc3130 is embedding two internal oscillators, high speed and low speed. the high-speed oscillator (hso) is factory-trimmed achieving high accuracy. ? high-speed oscillator (hso) : the mgc3130 is clocked by an internal hso running at 25 mhz 10% and consuming very low power. this clock is used to generate the tx signal, to trigger the adc conversions and to run the spu. during deep sleep mode, the hso clock is switched off. ? low-speed oscillator (lso) : this low-speed and ultra-low-power oscillator is typically 32 khz with a tolerance of 10 khz. it is used during power saving modes. 4.2.4 operation modes mgc3130 offers three operation modes that allow the user to balance power consumption with device functionality. in all of the modes described in this section, power saving is configured by gestic library messages. 4.2.4.1 processing mode in this mode, all power domains are enabled and the spu is running continuously. all peripheral digital blocks are active. each rx channel can be activated individually by gestic library depending on the application. gesture recognition and position tracking require the processing operation mode. 4.2.4.2 deep sleep mode during the deep sleep mode, v ddm and v dda are turned off, and v ddc is still powered to retain the data of the spu. the mode includes the following characteristics: ? the spu is halted ? the high-speed oscillator is shut down ? the low-speed oscillator is running ? the watchdog is switched off ? host interface pins are active for wake-up this leads to the lowest possible power consumption of mgc3130. the mgc3130 will resume from deep sleep if one of the following events occurs: ? external interrupt (irq0) or i 2 c0 start bit detection ? on mclr reset the deep sleep mode can be enabled by gestic library messages. 4.2.4.3 self wake-up mode the self wake-up mode is a low-power mode allowing an autonomous wake-up of the mgc3130 and application host. in this mode, the mgc3130 is automatically and periodically alternating between sleep and scan phases. the mgc3130?s fast wake-up, typically below 1 ms, allows to perform scans in very efficient periods and to maximize the sleep phase. the periodic wake-up sequence is triggered by a programmable wake-up timer running at lso frequency and which can be adjusted by the approach detection feature. the mgc3130 enters the self wake-up mode by a gestic library message or by a non-activity time-out. non-activity means no user detection within the sensing area. the mgc3130 will resume from self wake-up on one of the following events: ? wake-up timer overflow event ? external interrupt (irq0) or i 2 c0 start detection ? on mclr or wdtr
mgc3130 ds41667a-page 16 advance information ? 2012 microchip technology inc. 4.2.4.4 mgc3130 power profile the mgc3130 power profile is illustrated in figure 4-5 . figure 4-5: mgc3130 power profile mgc3130 current consumption for the different operation modes are summarized in tab l e 4 - 1 . the processing mode current consumption depends on the number of active rx channels, n rxchannels , and can be determined by equation 4-1 . equation 4-1: processing mode current consumption wake-up irq from host or i 2 c tm start detected approach detected no user interaction (time-out) t i i ds (1) =9a i peak (1) =30ma i sw1 (1) = 450 a deep sleep self wake-up self wake-up processing i peak : processing mode with 5 rx channels i sw1 : self wake-up with 150 ms approach scan and 10s calibration scan i sw2 : self wake-up with 150 ms approach scan and without calibration scan i ds : deep sleep (1) these are preliminary values @ 3.3v, typical i sw2 (1) =45a table 4-1: current consumption overview mode current consumption conditions processing mode 30 ma v dd = 3.3v 5 rx channels activated self wake-up mode 45 a v dd = 3.3v no calibration scan approach scan each 150 ms 450 a v dd = 3.3v calibration scan each 10s approach scan each 150 ms deep sleep mode 9 a v dd = 3.3v i peak 10 n rxchannels 4 ? ?? + ?? ma =
? 2012 microchip technology inc. advance information ds41667a-page 17 mgc3130 the self wake-up mode current consumption depends on the approach detection feature configuration: approach scan and calibration scan repetition period. changing these parameters results in different current consumption values. figure 4-6 and figure 4-7 describe the self wake-up mode current consumption according to the approach scan and calibration scan period change. figure 4-6: current cons umption for varying time intervals between approach scans and calibration scans figure 4-7: current cons umption for a fixed time interval between approach scans of 20 ms 0.046 0.299 1.993 2.230 0.435 0.685 0 0.5 1 1.5 2 2.5 0 50 100 150 200 current consumption (ma) time interval between approach scans (ms) no calibration scan calibration scan every 2s calibration scan every 10s 2.230 1.586 1.265 1.072 0.943 0.851 0.782 0.728 0.685 0 0.5 1 1.5 2 2.5 024681012 current consumption (ma) time interval between calibration scans (s)
mgc3130 ds41667a-page 18 advance information ? 2012 microchip technology inc. 4.2.4.5 operation modes summary table 4-2 summarizes the mgc3130 operation modes. 4.2.5 power-up/down sequence figure 4-8 represents the power-up sequence timings after a reset or deep sleep state. figure 4-8: power-up sequence timings table 4-2: operation modes summary mode entry exit comments processing i 2 c?0/irq0/approach/ mclr /wdtr/sw reset gestic ? library message/non- activity time-out/wdtr - processing mode with up to five electrodes continuously running - full positioning and gesture-detection capabilities self wake-up time-out/gestic ? library message i 2 c?0/irq0/wake-up timer/ mclr /wdtr - scan phase with a configurable number of rx active channels, wake-up timer is used to resume the system - approach detection capability - fast wake-up time - very low-power consumption deep sleep gestic ? library message i 2 c?0/irq0/mclr - spu halted, analog voltage regulator off, step-up off, watchdog off - no positioning or gesture detection - extreme low-power consumption - needs trigger from application host to switch into self wake-up or processing mode lso spu clk step-up enable spu halted spu running power-up processing operation hso enable v ref enable reset or deep sleep t pwrt t hso t stepup t spuclk
? 2012 microchip technology inc. advance information ds41667a-page 19 mgc3130 power-up phases ? reset or deep sleep: the system is kept in reset or is in deep sleep mode ? power-up: phase when the system starts up after reset/deep sleep has been released ? processing operation: processing mode is started ? power-up time-out signal references ? lso: low-speed oscillator clock ? hso: high-speed oscillator clock ?v ref enable: voltage reference enable signal ? hso enable: high-speed oscillator enable signal ? step-up enable: step-up converter enable signal figure 4-9 illustrates the power-down sequence timings. figure 4-9: power-down sequence timings table 4-3: power-up time-out (t pwrt ) signal symbol delay in lso cycles after reset after deep sleep (step-up on) after deep sleep (step-up off) v ref enable t vref 000 hso enable t hso 222 step-up t step-up 44x spu clk t spuclk 30 30 8 power-up time-out t pwrt 36 36 10 lso spu clk step-up enable spu halted spu running hso enable v ref enable processing operation power down request deep sleep
mgc3130 ds41667a-page 20 advance information ? 2012 microchip technology inc. power-down phases ? processing operation: processing mode is activated ? request: request to enter deep sleep mode ? power-down: power-down state (all analog signals are down) ? deep sleep: deep sleep mode has been entered signal references ? lso: low-speed oscillator clock ? hso: high-speed oscillator clock ?v ref enable: voltage reference enable signal ? hso enable: high-speed oscillator enable signal ? step-up enable: step-up converter enable signal 4.3 transmit signal generation the tx signal generation block provides a bandwidth limited square wave signal for the transmit electrode. frequency hopping adjusts automatically the tx carrier frequency in the range of 70-130 khz, depending on the environmental noise conditions. gestic library automatically selects the lowest noise working frequency in case the sensor signal is compromised. frequencies can be enabled/disabled via the gestic library. to support different mgc3130 applications, the tx signal generation block can be configured as follows: ? tx output level can be set between 0 and v dda voltage level. ? tx signal slew rate can be controlled for lower noise radiation (emi). all these configurations are available through gestic library messages. 4.4 receive (rx) channels there are five identical rx channels that can be used for five respective receive electrodes. four receive electrodes are required for position tracking and gesture recognition. a fifth electrode can be used for touch detection and to improve distance measurement. each channel has its own analog signal conditioning stage, followed by a dedicated adc. for specific features such as approach detection, individual rx channels can be activated or deactivated via the gestic library. according to the electrode characteristics, the channels have to be parameterized. the signal conditioning block contains analog filtering and amplification as shown in figure 4-10 . figure 4-10: signal conditioning block for individual electrode characteristics, the rx channels can be configured as follows: ? signal matching : the received signal is sampled at a sampling rate, equal to twice the tx frequency providing a high and low adc sample. the signal matching block adjusts the received signal towards the same value of high and low adc samples. the offset can be adjusted accordingly. ? the matched signal output is amplified using a programmable gain amplifier to achieve a better sensitivity. 4.5 analog-to-digital converter (adc) as outlined in section 4.4 ?receive (rx) channels? , each rx channel features a dedicated adc. the adc trigger source can be selected between the internal clock and an external sync signal. adc samples are synchronous with twice the tx transmit frequency. the external sync signal is reserved for dual chip/dual zone designs. 4.6 signal processing unit (spu) the mgc3130 features a signal processing unit (spu) to control the hardware blocks and process the advanced dsp algorithms included in the gestic library. it provides filtered sensor data, continuous position information and recognized gestures to the application host. the host combines the information and controls its application. 4.7 parameters storage the mgc3130 provides an embedded 32 kbytes flash memory which is dedicated for the gestic library and storage of the individual configuration parameters. these parameters have to be set according to the individual electrode design and application. the gestic library and parameters are loaded into mgc3130 with the provided software tools or, alternatively, via gestic library messages by the application host. for more details on the mgc3130 tools, please refer to section 8.0 ?development support? . rx gain v dda /2 signal conditioning block rx input signal matching buffer
? 2012 microchip technology inc. advance information ds41667a-page 21 mgc3130 5.0 application architecture (1) mgc3130 supports two different implementations: single-zone design and dual-zone design. 5.1 single-zone design the standard mgc3130 implementation is a single- zone design. this configuration is based on one mgc3130 connected to an application host. the interface can be either configured as i 2 c master, i 2 c slave, spi master or spi slave, depending on the overall system design (see figure 5-1 ). data reporting and flow-control scenarios are described below for either i 2 c or spi configurations: ? if mgc3130 is i 2 c or spi slave and the host is i 2 c or spi master: - host interface is i 2 c0 - eio0 is toggled indicating that new data is available ? if mgc3130 is i 2 c or spi master and the host is i 2 c or spi slave: - data is sent to the host automatically when ready - data is sent on an eio toggle of the host system figure 5-1: single-zone design 5.2 dual-zone design in addition to a single-zone design, the mgc3130?s 4-pin digital interface also allows dual-zone designs by adding a second mgc3130, as shown in figure 5-2 . a dual-zone design allows detection of users hand motion in two independent zones (e.g., one for each hand) to expand user input options. in such a configuration, one mgc3130 acts as the dual-zone master device and the second acts as dual-zone slave device. the communication data flow is as follows: position tracking data and recognized gestures from the dual-zone slave is transferred to the host via the mgc3130 dual-zone master. figure 5-2: dual-zone design note 1: currently, only single-zone i 2 c? slave mode is supported. other modes are planned for future releases of gestic ? library. please contact your microchip representative for further details. mgc3130 single zone i 2 c tm 0 i 2 c tm gpio eio0 host note 1: currently, only single-zone i 2 c? slave mode is supported. other modes are planned for future releases of gestic? library. please contact your microchip representative for further details. mgc3130 dual zone master i 2 c tm 0 i 2 c tm gpio eio0 host eio2 i 2 c tm 1 mgc3130 dual zone slave i 2 c tm 0 eio0 eio3 eio3
mgc3130 ds41667a-page 22 advance information ? 2012 microchip technology inc. 6.0 interface description (1) the mgc3130 supports two communication interfaces: i 2 c and spi. 6.1 interface selection the mgc3130 interface selection pin, is2, is used to select i 2 c slave address. there are two different addresses. 6.2 extended input output (eio) the mgc3130 provides four input/output pins with extended features. these pins are controlled by gestic library and listed in table 6-2 . 6.3 interrupt requests mgc3130 irq0 and irq1 interrupt lines are used by the host to wake-up the mgc3130 from deep sleep and self wake-up modes. if a wake-up event is detected on irq0 or irq1 lines, the mgc3130 switches to the processing mode. 6.4 synchronization the mgc3130 tx signal can be output on the sync pin. the sync pin can be also used as an adc trigger input. in future, this configuration is used for dual-zone design implementations. the tx signal is output on the sync pin of the dual-zone master and connected to the sync pin of the dual-zone slave. 6.5 communication interfaces 6.5.1 i 2 c the mgc3130 supports two i 2 c interfaces. only i 2 c0 is used in a single-zone configuration. i 2 c0 and i 2 c1 features: ? two ports: scl0, sda0 and scl1, sda1 ? master and slave mode ? up to 400 khz ? 7-bit addressing mode ? hardware state machine for basic protocol handling ? support for repeated start and clock stretching (byte mode) ? no multi-master support i 2 c hardware interface a summary of the hardware interface pins is shown below in tab l e 6 - 3 . ?scl pin - the scl (serial clock) pin is electrically open-drain and requires a pull-up resistor of typically 1.8 k ? (for a maximum bus load capacitance of 200 pf), from scl to v dd . scl idle state is high. ?sda pin - the sda (serial data) pin is electrically open-drain and requires a pull-up resistor of typically 1.8 k ? (for a maximum bus load capacitance of 200 pf), from sda to v dd . - sda idle state is high. - master write data is latched in on scl rising edges. - master read data is latched out on scl falling edges to ensure it is valid during the subsequent scl high time. i 2 c addressing : the mgc3130?s device id 7-bit address is: 0x42 ( 0b1000010 ) or 0x43 ( 0b1000011 ) depending on the interface selection pin configuration (is2). please refer to tab l e 6 - 4 . note 1: currently, only single-zone i 2 c? slave mode with i 2 c0 is supported. other modes are planned for future releases of gestic ? library. please contact your microchip representative for further details. table 6-1: mgc3130 interface selection pins is2 is1 is0 mode (address) 00 0 i 2 c?0 slave address 1 (0x42) 10 0 i 2 c?0 slave address 2 (0x43) table 6-2: mgc3130 extended ios functions pin pin number multiplexed functions eio0 12 is0 eio1 13 is1 eio2 14 irq0 eio3 19 irq1/sync table 6-3: i 2 c? pin description mgc3130 pin multiplexed functions scl serial clock to master i 2 c? sda serial data to master i 2 c? table 6-4: i 2 c? device id address device id address, 7-bit a6 a5 a4 a3 a2 a1 a0 100001 is2
? 2012 microchip technology inc. advance information ds41667a-page 23 mgc3130 i 2 c master read bit timing (mgc3130 i 2 c slave) master read is to receive position data, gesture reports and command responses from the mgc3130. the timing diagram is shown in figure 6-1 . ? address bits are latched into the mgc3130 on the rising edges of scl. ? data bits are latched out of the mgc3130 on the rising edges of scl. ? ack bit: - mgc3130 presents the ack bit on the ninth clock for address acknowledgment -i 2 c master presents the ack bit on the ninth clock for data acknowledgment ?the i 2 c master must monitor the scl pin prior to asserting another clock pulse, as the mgc3130 may be holding off the i 2 c master by stretching the clock.i i 2 c communication steps ? scl and sda lines are idle high. ?i 2 c master presents start bit to the mgc3130 by taking sda high-to-low, followed by taking scl high-to-low. ?i 2 c master presents 7-bit address, followed by a r/w = 1 (read mode) bit to the mgc3130 on sda, at the rising edge of eight master clock (scl) cycles. ? mgc3130 compares the received address to its device id. if they match, the mgc3130 acknowledges (ack) the master sent address by presenting a low on sda, followed by a low-high- low on scl. ?i 2 c master monitors scl, as the mgc3130 may be clock stretching, holding scl low to indicate that the i 2 c master should wait. ?i 2 c master receives eight data bits (msb first) presented on sda by the mgc3130, at eight sequential i 2 c master clock (scl) cycles. the data is latched out on scl falling edges to ensure it is valid during the subsequent scl high time. ? if data transfer is not complete, then: -i 2 c master acknowledges (ack) reception of the eight data bits by presenting a low on sda, followed by a low-high-low on scl. - go to step 5. ? if data transfer is complete, then: -i 2 c master acknowledges (ack) reception of the eight data bits and a completed data transfer by presenting a high on sda, followed by a low-high-low on scl. i 2 c master write bit timing (mgc3130 slave) i 2 c master write is to send supported commands to the mgc3130. the timing diagram is shown in figure 6-2 . ? address bits are latched into the mgc3130 on the rising edges of scl. ? data bits are latched into the mgc3130 on the rising edges of scl. ? ack bit: - mgc3130 presents the ack bit on the ninth clock for address acknowledgment -i 2 c master presents the ack bit on the ninth clock for data acknowledgment ? the master must monitor the scl pin prior to asserting another clock pulse, as the mgc3130 may be holding off the master by stretching the clock. i 2 c communication steps ? scl and sda lines are idle high. ?i 2 c master presents start bit to the mgc3130 by taking sda high-to-low, followed by taking scl high-to-low. ?i 2 c master presents 7-bit address, followed by a r/w = 0 (write mode) bit to the mgc3130 on sda, at the rising edge of eight master clock (scl) cycles. ? mgc3130 compares the received address to its device id. if they match, the mgc3130 acknowledges (ack) the i 2 c master sent address by presenting a low on sda, followed by a low- high-low on scl. ?i 2 c master monitors scl, as the mgc3130 may be clock stretching, holding scl low to indicate the i 2 c master should wait. ?i 2 c master presents eight data bits (msb first) to the mgc3130 on sda, at the rising edge of eight master clock (scl) cycles. ? mgc3130 acknowledges (ack) receipt of the eight data bits by presenting a low on sda, followed by a low-high-low on scl. ? if data transfer is not complete, then go to step 5. ? master presents a stop bit to the mgc3130 by taking scl low-high, followed by taking sda low- to-high. table 6-5: i 2 c? device write id address (0x84 or 0x86) i 2 c? device write id address a7 a6 a5 a4 a3 a2 a1 a0 100001 is2 0 table 6-6: i 2 c? device read id address (0x85 or 0x87) i 2 c? device read id address a7 a6 a5 a4 a3 a2 a1 a0 100001 is2 1
mgc3130 ds41667a-page 24 advance information ? 2012 microchip technology inc. 6.5.2 spi (1) spi features: ? one port: sclk, cs, mosi, miso ? master and slave mode ? up to 3 mhz ? support of all clock edge and polarity options spi hardware interface a summary of the hardware interface pins is shown below in tab l e 6 - 7 . ?sck pin: - the mgc3130 controller?s sclk pin drives the communication bus clock. - the idle state of the sclk should be low. - data is transmitted on the falling edge of sclk. ?mosi pin: - the mgc3130 controller?s mosi pin sends/ reads serial data to/from the slave/host. ?miso pin: - the mgc3130 controller?s miso pin reads/ sends serial data from/to the slave/host. ?cs pin: - the mgc3130 controller?s cs pin provides device selection functionality. table 6-7: spi pin description mgc3130 pin description sclk master clock cs chip select miso master input slave output mosi master output slave input table 6-8: spi cs pin description cs pin description v ss active v dd inactive
? 2012 microchip technology inc. advance information ds41667a-page 25 mgc3130 figure 6-1: i 2 c? master read bit timing diagram figure 6-2: i 2 c? master write bit timing diagram 3 12 456789 3 12 456789 3 12 456789 a7 a6 a5 a4 a3 a2 a1 1 d7 d6 d5 d4 d3 d2 d1 d0 d7 d6 d5 d4 d3 d2 d1 d0 address r/w ack ack ack data data address bits latched in data bits valid out data bits valid out scl may be stretched scl may be stretched s p start bit stop bit sda scl 3 12 456789 3 12 456789 3 12 456789 a7 a6 a5 a4 a3 a2 a1 0 d7 d6 d5 d4 d3 d2 d1 d0 d7 d6 d5 d4 d3 d2 d1 d0 address r/w ack ack ack data data address bits latched in data bits valid out data bits valid out scl may be stretched scl may be stretched s p start bit stop bit sda scl
mgc3130 ds41667a-page 26 advance information ? 2012 microchip technology inc. 7.0 hardware integration 7.1 esd considerations the mgc3130 provides electrostatic discharge (esd) voltage protection up to 2 kv (hbm). additional esd countermeasures may be implemented individually to meet application-specific requirements. 7.2 power noise considerations mgc3130 filtering capacitors are included in the refer- ence design schematic (please refer to figure 7-1 ). 7.3 standard schematic (3.3v ?? v dd ? 3.6v) a standard application schematic for the 28-lead qfn package pinout is depicted below in figure 7-1 . for more details, please refer to figure 1 . figure 7-1: standard schematic for 3.3v ? v dd ? 3.6v voltage range 7.4 bill of materials (3.3v ? v dd ? 3.6v) modifying, removing or adding components may adversely affect mgc3130 performance. center electrode vdd vss1 vss3 v cc 100 nf 4.7 f 220 nf is2 mclr si0 si1 eio0 eio1 eio2 sda scl irq host v cc 1.8 ko 1.8 ko v cc 10 ko n.m. reset 10 ko v cc north electrode south electrode mgc3130 txd rx0 rx1 rx2 rx3 rx4 v dd v inds v caps v capa v ss 3 v capd exp v ss 1 nc nc nc si2 si3 v ss 2 eio3 is2 mclr si0 si1 eio0 eio1 eio2 east electrode west electrode nc c1 c3 c2 r1 r2 r5 r4 r3 table 7-1: bill of materials for 3.3v ? v dd ? 3.6v label qty value description r1, r2, r3 2 10 k ? res thick film 10 k ???? c1 1 100 nf capacitor ? ceramic, 0.1 f, 10%, 16v c2 1 4.7 f/6.3v capacitor ? ceramic, 4.7 f, 10%, 6.3v c3 1 220 nf capacitor ? ceramic, 0.22 f, 10%, 10v r4, r5 2 1.8 k ? res thick film 1,8 k ????
? 2012 microchip technology inc. advance information ds41667a-page 27 mgc3130 7.5 standard schematic step-up setup (2.5v ?? v dd ? 3.6v) figure 7-2: schematic step-up setup for 2.5v ? v dd ? 3.6v voltage range 7.6 bill of materials (2.5v ? v dd ? 3.6v) modifying, removing, or adding components may adversely affect mgc3130 performance. center electrode vdd vss1 vss3 v cc 100 nf 4.7 f 220 nf is2 mclr si0 si1 eio0 eio1 eio2 sda scl irq host v cc 1.8 ko 1.8 ko v cc 10 ko n.m. reset 10 ko v cc north electrode south electrode mgc3130 txd rx0 rx1 rx2 rx3 rx4 v dd v inds v caps v capa v ss 3 v capd exp v ss 1 nc nc nc si2 si3 v ss 2 eio3 is2 mclr si0 si1 eio0 eio1 eio2 east electrode west electrode nc 10 f 4.7 h c1 c2 c3 c4 r1 r2 r3 r5 r4 d1 l1 table 7-2: bill of materials for 2.5v ? v dd ? 3.6v label qty value description r1, r2, r3 2 10 k ? res thick film 10 k ???? c1 1 100 nf capacitor ? ceramic, 0.1 f, 10%, 16v c2 1 4.7 f/6.3v capacitor ? ceramic, 4.7 f, 10%, 6.3v c3 1 220 nf capacitor ? ceramic, 0.22 f, 10%, 10v r4, r5 2 1.8 k ? res thick film 1,8 k ???? c4 1 10 f capacitor ? ceramic, 10 f, 20%, 6.3v l1 1 4.7 h inductor, 4.7 h 20% d1 1 ? diode schottky, 20v, 0.5a
mgc3130 ds41667a-page 28 advance information ? 2012 microchip technology inc. 7.7 layout recommendation this section will provide a brief description of layout hints for a proper system design. the pcb layout requirements for mgc3130 follow the general rules for a mixed signal design. in addition, there are certain requirements to be considered for the sensor signals and electrode feeding lines. the chip should be placed as close as possible to the electrodes to keep their feeding lines as short as possible. furthermore, it is recommended to keep mgc3130 away from electrical and thermal sources within the system. analog and digital signals should be separated from each other during pcb layout in order to minimize crosstalk. the individual electrode feeding lines should be kept as far as possible apart from each other. v dd lines should be routed as wide as possible. for designs using the step-up circuitry, the additional components required should be placed as close as possible to the mgc3130. mgc3130 requires a proper ground connection on all v ss pins, including the exposed pad (pin 29).
? 2012 microchip technology inc. advance information ds41667a-page 29 mgc3130 8.0 development support microchip provides software and hardware development tools for the mgc3130: ? visualization and configuration environment: - mgc3130 ? aurea control software ? programming interface: - mgc3130 ? application programming interface (api) ? reference code ? evaluation and development kits: - mgc3130 ? sabrewing single-zone evaluation kit - mgc3130 ? hillstar development kit (in preparation) 8.1 mgc3130 ? aurea control software mgc3130 ? aurea control software is the visualization and control environment for the mgc3130. features include: ? microsoft windows ? 7/8 operating system ? mgc3130 real-time sensor data display ? 2d and 3d visualization of position ? visualization of recognized gestures ? afe parameterization ? gestic library loader ? colibri suite parameterization (future) 8.2 programming interface microchip provides a standard c reference code with an application programming interface (api). the code will support developers to integrate the mgc3130 solution into the target application. 8.3 evaluation and demonstration kits a variety of demonstration, development and evaluation boards allow quick application development on fully-functional systems. the demonstration and development boards can be used in teaching environments, for prototyping custom circuits and for learning about various gestic mgc3130 applications. the first mgc3130 evaluation board is the sabrewing single-zone evaluation board. it contains the mgc3130 reference circuitry and two sets of selectable frame electrodes (5? and 7?). in combination with aurea control software, sabrewing can be used as a starter kit. the set contains all materials required for first mgc3130 evaluation experience. for the complete list of demonstration, development and evaluation kits, please refer to the microchip web site ( http://www.microchip.com ).
mgc3130 ds41667a-page 30 advance information ? 2012 microchip technology inc. 9.0 electrical specifications absolute maximum ratings (?) ambient temperature under bias ................................................................................................. ........ -20c to +85c storage temperature ............................................................................................................ ............ -55c to +125c voltage on v dd with respect to v ss .................................................................................................... -0.3v to +3.6v voltage on all other pins with respect to v ss ............................................................................ -0.3v to (v dd + 0.3v) total power dissipation ........................................................................................................ ...........................100 mw esd protection on all pins ..................................................................................................... ............................... 2 kv ? notice: stresses above those listed under ?absolute maximum ratings? may cause permanent damage to the device. this is a stress rating only and functional operation of the device at those or any other conditions above those indicated in the operation listings of this specification is not implied. exposure to maximum rating conditions for extended periods may affect device reliability. ? notice: this device is sensitive to esd damage and must be handled appropriately. failure to properly handle and protect the device in an application may cause partial to complete failure of the device.
? 2012 microchip technology inc. advance information ds41667a-page 31 mgc3130 10.0 packaging information 10.1 package marking information 28-lead qfn (5x5x0.9 mm) example pin 1 pin 1 mgc3130 -i/mq 1210017 3 e * standard pic ? device marking consists of microchip part number, year code, week code, and traceability code. for pic device marking beyond this, certain price adders apply. please check with your microchip sales office. for qtp devices, any special marking adders are included in qtp price. legend: xx...x customer-specific information y year code (last digit of calendar year) yy year code (last 2 digits of calendar year) ww week code (week of january 1 is week ?01?) nnn alphanumeric traceability code pb-free jedec designator for matte tin (sn) * this package is pb-free. the pb-free jedec designator ( ) can be found on the outer packaging for this package. note : in the event the full microchip part number cannot be marked on one line, it will be carried over to the next line, thus limiting the number of available characters for customer-specific information. 3 e 3 e
mgc3130 ds41667a-page 32 advance information ? 2012 microchip technology inc. 10.2 package details the following sections give the technical details of the packages. note: for the most current package drawings, please see the microchip packaging specification located at http://www.microchip.com/packaging
? 2012 microchip technology inc. advance information ds41667a-page 33 mgc3130 28-lead plastic quad flat, no lead package (mq) ? 5x5 mm body [qfn] land pattern with 0.55 mm contact length note: for the most current package drawings, please see the microchip packaging specification located at http://www.microchip.com/packaging microchip technology drawing c04-2140a
mgc3130 ds41667a-page 34 advance information ? 2012 microchip technology inc. appendix a: data sheet revision history revision a (11/2012) initial release of this data sheet.
? 2012 microchip technology inc. advance information ds41667a-page 35 mgc3130 index symbols applications........................................................................... 1 peripheral features .............................................................. 1 power features..................................................................... 1 numerics 28-pin diagram ..................................................................... 2 28-pin qfn pinout description ............................................. 3 a absolute maximum ratings ................................................ 30 analog-to-digital converter (adc)...................................... 20 application architecture ...................................................... 21 c communication interfaces .................................................. 22 customer change notification service ............................... 36 customer notification service............................................. 36 customer support............................................................... 36 d development support ......................................................... 29 dual-zone design ............................................................... 21 e electrical specifications ...................................................... 30 electrode equivalent circuit................................................ 10 errata .................................................................................... 4 esd considerations............................................................ 26 evaluation and demonstration kits..................................... 29 extended input output (eio) .............................................. 22 external electrodes .............................................................. 9 f feature description............................................................... 7 functional description ........................................................ 12 g gestic library................................................................... 7, 9 gestic technology benefits ................................................. 6 gesture definition ................................................................. 7 h hardware integration .......................................................... 26 i interface description ........................................................... 22 interface selection .............................................................. 22 internet address.................................................................. 36 interrupt requests .............................................................. 22 introduction ........................................................................... 1 k key features......................................................................... 1 l layout recommendation .................................................... 28 m mgc3130 - aurea control software ................................... 29 mgc3130 controller ............................................................. 9 microchip internet web site................................................ 36 p package type....................................................................... 2 packaging qfn ............................................................................ 32 packaging information........................................................ 31 parameters storage............................................................ 20 power control and clocks .................................................. 13 power noise considerations .............................................. 26 programming interface ....................................................... 29 r reader response............................................................... 37 reset block ........................................................................ 13 revision history.................................................................. 34 rx channels ....................................................................... 20 s signal processing unit (spu)............................................. 20 single-zone design ............................................................ 21 standard electrode design................................................. 11 synchronization .................................................................. 22 system architecture.............................................................. 9 t theory of operation electrical near-field (e-field) sensing ........................ 5 transmit signal generation ................................................ 20 w www address ................................................................... 36 www, on-line support ....................................................... 4
mgc3130 ds41667a-page 36 advance information ? 2012 microchip technology inc. the microchip web site microchip provides online support via our www site at www.microchip.com . this web site is used as a means to make files and information easily available to customers. accessible by using your favorite internet browser, the web site contains the following information: ? product support ? data sheets and errata, application notes and sample programs, design resources, user?s guides and hardware support documents, latest software releases and archived software ? general technical support ? frequently asked questions (faq), technical support requests, online discussion groups, microchip consultant program member listing ? business of microchip ? product selector and ordering guides, latest microchip press releases, listing of seminars and events, listings of microchip sales offices, distributors and factory representatives customer change notification service microchip?s customer notification service helps keep customers current on microchip products. subscribers will receive e-mail notification whenever there are changes, updates, revisions or errata related to a specified product family or development tool of interest. to register, access the microchip web site at www.microchip.com . under ?support?, click on ?customer change notification? and follow the registration instructions. customer support users of microchip products can receive assistance through several channels: ? distributor or representative ? local sales office ? field application engineer (fae) ? technical support ? development systems information line customers should contact their distributor, representative or field application engineer (fae) for support. local sales offices are also available to help customers. a listing of sales offices and locations is included in the back of this document. technical support is available through the web site at: http://microchip.com/support
? 2012 microchip technology inc. advance information ds41667a-page 37 mgc3130 reader response it is our intention to provide you with the best documentation possible to ensure successful use of your microchip product. if you wish to provide your comments on organization, clarity, subject matter, and ways in which our documentation can better serve you, please fax your comments to the technical publications manager at (480) 792-4150. please list the following information, and use this outline to provide us with your comments about this document. to: technical publications manager re: reader response total pages sent ________ from: name company address city / state / zip / country telephone: (_______) _________ - _________ application (optional): would you like a reply? y n device: literature number: questions: fax: (______) _________ - _________ ds41667a mgc3130 1. what are the best features of this document? 2. how does this document meet your hardware and software development needs? 3. do you find the organization of this document easy to follow? if not, why? 4. what additions to the document do you think would enhance the structure and subject? 5. what deletions from the document could be made without affecting the overall usefulness? 6. is there any incorrect or misleading information (what and where)? 7. how would you improve this document?
mgc3130 ds41667a-page 38 advance information ? 2012 microchip technology inc. product identification system to order or obtain information, e.g., on pricing or delivery, refer to the factory or the listed sales office . part no. x /xx xxx pattern package temperature range device device: mgc3130 tape and reel option: blank = standard packaging (tube or tray) t = tape and reel (1) temperature range: i= -40 ? c to +85 ? c (industrial) package: (2) mq = qfn pattern: qtp, sqtp, code or special requirements (blank otherwise) examples: a) mgc3130 - i/mq industrial temperature, qfn package note 1: tape and reel identifier only appears in the catalog part number description. this identifier is used for ordering purposes and is not printed on the device package. check with your microchip sales office for package availability with the tape and reel option. 2: for other small form-factor package availability and marking information, please visit www.microchip.com/packaging or contact your local sales office. [x] (1) tape and reel option -
? 2012 microchip technology inc. advance information ds41667a-page 39 information contained in this publication regarding device applications and the like is provided only for your convenience and may be superseded by updates. it is your responsibility to ensure that your application meets with your specifications. microchip makes no representations or warranties of any kind whether express or implied, written or oral, statutory or otherwise, related to the information, including but not limited to its condition, quality, performance, merchantability or fitness for purpose . microchip disclaims all liability arising from this information and its use. use of microchip devices in life support and/or safety applications is entirely at the buyer?s risk, and the buyer agrees to defend, indemnify and hold harmless microchip from any and all damages, claims, suits, or expenses resulting from such use. no licenses are conveyed, implicitly or otherwise, under any microchip intellectual property rights. trademarks the microchip name and logo, the microchip logo, dspic, flashflex, k ee l oq , k ee l oq logo, mplab, pic, picmicro, picstart, pic 32 logo, rfpic, sst, sst logo, superflash and uni/o are registered trademarks of microchip technology incorporated in the u.s.a. and other countries. filterlab, hampshire, hi-tech c, linear active thermistor, mtp, seeval and the embedded control solutions company are registered trademarks of microchip technology incorporated in the u.s.a. silicon storage technology is a registered trademark of microchip technology inc. in other countries. analog-for-the-digital age, application maestro, bodycom, chipkit, chipkit logo, codeguard, dspicdem, dspicdem.net, dspicworks, dsspeak, ecan, economonitor, fansense, hi-tide, in-circuit serial programming, icsp, mindi, miwi, mpasm, mpf, mplab certified logo, mplib, mplink, mtouch, omniscient code generation, picc, picc-18, picdem, picdem.net, pickit, pictail, real ice, rflab, select mode, sqi, serial quad i/o, total endurance, tsharc, uniwindriver, wiperlock, zena and z-scale are trademarks of microchip technology incorporated in the u.s.a. and other countries. sqtp is a service mark of mi crochip technology incorporated in the u.s.a. gestic and ulpp are registered trademarks of microchip technology germany ii gmbh & co. & kg, a subsidiary of microchip technology inc., in other countries. all other trademarks mentioned herein are property of their respective companies. ? 2012, microchip technology incorporated, printed in the u.s.a., all rights reserved. printed on recycled paper. isbn: 9781620766712 note the following details of the code protection feature on microchip devices: ? microchip products meet the specification cont ained in their particular microchip data sheet. ? microchip believes that its family of products is one of the most secure families of its kind on the market today, when used i n the intended manner and under normal conditions. ? there are dishonest and possibly illegal methods used to breach the code protection feature. all of these methods, to our knowledge, require using the microchip products in a manner outsi de the operating specifications c ontained in microchip?s data sheets. most likely, the person doing so is engaged in theft of intellectual property. ? microchip is willing to work with the customer who is concerned about the integrity of their code. ? neither microchip nor any other semiconductor manufacturer can guarantee the security of their code. code protection does not mean that we are guaranteeing the product as ?unbreakable.? code protection is constantly evolving. we at microchip are co mmitted to continuously improvin g the code protection features of our products. attempts to break microchip?s code protection feature may be a violation of the digital millennium copyright act. if such acts allow unauthorized access to your software or other copyrighted work, you may have a right to sue for relief under that act. microchip received iso/ts-16949:2009 certification for its worldwide headquarters, design and wafer fabrication facilities in chandler and tempe, arizona; gresham, oregon and design centers in california and india. the company?s quality system processes and procedures are for its pic ? mcus and dspic ? dscs, k ee l oq ? code hopping devices, serial eeproms, microperipherals, nonvolatile memory and analog products. in addition, microchip?s quality system for the design and manufacture of development systems is iso 9001:2000 certified. quality management s ystem certified by dnv == iso/ts 16949 ==
ds41667a-page 40 advance information ? 2012 microchip technology inc. americas corporate office 2355 west chandler blvd. chandler, az 85224-6199 tel: 480-792-7200 fax: 480-792-7277 technical support: http://www.microchip.com/ support web address: www.microchip.com atlanta duluth, ga tel: 678-957-9614 fax: 678-957-1455 boston westborough, ma tel: 774-760-0087 fax: 774-760-0088 chicago itasca, il tel: 630-285-0071 fax: 630-285-0075 cleveland independence, oh tel: 216-447-0464 fax: 216-447-0643 dallas addison, tx tel: 972-818-7423 fax: 972-818-2924 detroit farmington hills, mi tel: 248-538-2250 fax: 248-538-2260 indianapolis noblesville, in tel: 317-773-8323 fax: 317-773-5453 los angeles mission viejo, ca tel: 949-462-9523 fax: 949-462-9608 santa clara santa clara, ca tel: 408-961-6444 fax: 408-961-6445 toronto mississauga, ontario, canada tel: 905-673-0699 fax: 905-673-6509 asia/pacific asia pacific office suites 3707-14, 37th floor tower 6, the gateway harbour city, kowloon hong kong tel: 852-2401-1200 fax: 852-2401-3431 australia - sydney tel: 61-2-9868-6733 fax: 61-2-9868-6755 china - beijing tel: 86-10-8569-7000 fax: 86-10-8528-2104 china - chengdu tel: 86-28-8665-5511 fax: 86-28-8665-7889 china - chongqing tel: 86-23-8980-9588 fax: 86-23-8980-9500 china - hangzhou tel: 86-571-2819-3187 fax: 86-571-2819-3189 china - hong kong sar tel: 852-2401-1200 fax: 852-2401-3431 china - nanjing tel: 86-25-8473-2460 fax: 86-25-8473-2470 china - qingdao tel: 86-532-8502-7355 fax: 86-532-8502-7205 china - shanghai tel: 86-21-5407-5533 fax: 86-21-5407-5066 china - shenyang tel: 86-24-2334-2829 fax: 86-24-2334-2393 china - shenzhen tel: 86-755-8203-2660 fax: 86-755-8203-1760 china - wuhan tel: 86-27-5980-5300 fax: 86-27-5980-5118 china - xian tel: 86-29-8833-7252 fax: 86-29-8833-7256 china - xiamen tel: 86-592-2388138 fax: 86-592-2388130 china - zhuhai tel: 86-756-3210040 fax: 86-756-3210049 asia/pacific india - bangalore tel: 91-80-3090-4444 fax: 91-80-3090-4123 india - new delhi tel: 91-11-4160-8631 fax: 91-11-4160-8632 india - pune tel: 91-20-2566-1512 fax: 91-20-2566-1513 japan - osaka tel: 81-66-152-7160 fax: 81-66-152-9310 japan - yokohama tel: 81-45-471- 6166 fax: 81-45-471-6122 korea - daegu tel: 82-53-744-4301 fax: 82-53-744-4302 korea - seoul tel: 82-2-554-7200 fax: 82-2-558-5932 or 82-2-558-5934 malaysia - kuala lumpur tel: 60-3-6201-9857 fax: 60-3-6201-9859 malaysia - penang tel: 60-4-227-8870 fax: 60-4-227-4068 philippines - manila tel: 63-2-634-9065 fax: 63-2-634-9069 singapore tel: 65-6334-8870 fax: 65-6334-8850 taiwan - hsin chu tel: 886-3-5778-366 fax: 886-3-5770-955 taiwan - kaohsiung tel: 886-7-213-7828 fax: 886-7-330-9305 taiwan - taipei tel: 886-2-2508-8600 fax: 886-2-2508-0102 thailand - bangkok tel: 66-2-694-1351 fax: 66-2-694-1350 europe austria - wels tel: 43-7242-2244-39 fax: 43-7242-2244-393 denmark - copenhagen tel: 45-4450-2828 fax: 45-4485-2829 france - paris tel: 33-1-69-53-63-20 fax: 33-1-69-30-90-79 germany - munich tel: 49-89-627-144-0 fax: 49-89-627-144-44 italy - milan tel: 39-0331-742611 fax: 39-0331-466781 netherlands - drunen tel: 31-416-690399 fax: 31-416-690340 spain - madrid tel: 34-91-708-08-90 fax: 34-91-708-08-91 uk - wokingham tel: 44-118-921-5869 fax: 44-118-921-5820 worldwide sales and service 10/26/12

▲Up To Search▲

Price & Availability of MGC313012

	To Download MGC313012 Datasheet File
If you can't view the Datasheet, Please click here to try to view without PDF Reader .